A generic name for various kinds of dynamic random access memory: DRAM that are synchronized with the clock speed that the microprocessor is optimized for. This tends to increase the number of instructions that the processor can perform in a given time. The speed of SDRAM is rated in MHz rather than in nanoseconds (ns). This makes it easier to compare the bus speed and the RAM chip speed. You can convert the RAM clock speed to nanoseconds by dividing the chip speed into 1 billion ns (which is one second). For example, an 83 MHz RAM would be equivalent to 12 ns.

SDRAM is an improved type of DRAM. Whilst DRAM has an asynchronous interface, meaning that it reacts immediately to changes in its control inputs, SDRAM has a synchronous interface, meaning that it waits for a clock pulse before responding to its control inputs. The clock is used to drive an internal finite state machine that can pipeline incoming commands. This allows the chip to have a more complex pattern of operation than plain DRAM.

Pipelining means that the chip can accept a new command before it has finished processing the previous one. In a pipelined write, the write command can be immediately followed by another command without waiting for the data to be written to the memory array. In a pipelined read, the requested data appears a fixed number of clock pulses after the read command. It is not necessary to wait for the data to appear before sending the next command. This delay is called the latency, and is an important parameter to be considered when purchasing SDRAM for your computer.